An intelligent multi-terminal interface.
Peplow, Roger Charles Samuel.
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The document describes the development of a micro-processor based terminal multiplexer to connect four terminals to a standard Hewlett Packard series 1000 mini-computer. The project was required to fulfill the dual roll of both increasing the number of terminals that the HPI000 could support and of reducing the peripheral load on the host CPU. The final product occupied a standard 200mm square HP size interface card and used an 8085 micro-processor and several 8085 family peripheral chips to provide four full duplex serial channels and a high speed data link with the host. A multi-tasking executive was written to control the multiplexer software which was finally implemented as 15 independent tasks occupying 8 kilo-bytes of eprom. The software was written to perform all terminal interaction and editing in order to reduce the host CPU involvement to a single interrupt per record. The resultant interface proved capable of handling an aggregate throughput in excess of 4000 characters per second which was sufficient to cope with all four terminals running at 9600 bits per second, even when all four were transferring in burst mode. The interface also proved to be between five and eighteen times less demanding on the host than the two standard Hewlett Packard interfaces then available. When compared to the low cost HP12531 interface, the multiplexer increased the 9600b/s terminal handling capability of the host from 3 terminals to 52.
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