Design evolution of dual-material gate structure in cylindrical surrounding double-gate (CSDG) MOSFET using physics-based analytical modeling.

Abstract

The Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is the fundamental component in present Micro and Nano-electronics device applications, such as switching, memory devices, communication devices, etc. MOSFET’s dimension has shrunk down following Moore’s law to attain high-speed operation and packing density integration. The scaling of conventional MOSFET has been the most prominent technological challenge in the past few years because the decreasing device dimensions increase the charge sharing from the source to the drain and that in turn give rises to the reduced gate-control over the channel, hot carrier induced degradation, and other SCEs. These undesired effects devaluate the device performance that compels optimum device design analysis for particular operating conditions. Therefore, several innovative device design/architectures, including Double-gate, FinFET, Surrounding gate MOSFET, etc., have been developed to mitigate device scaling challenges. Comprehensive research can be traced long for one such promising gate-all-around MOSFET, i.e., Cylindrical Surrounding Double-Gate (CSDG) MOSFET centrally hollow concentric structure, provides an additional internal control gate that improves the device electrical performance and offers easy accessibility. There have been several developments in terms of improvements, and applications of CSDG MOSFET have been practiced since after its evolution. This thesis’s work has been targeted to incorporate the gate material engineering in the CSDG structure after appropriate analysis of device physics-based modeling. In particular to the proposed structure, the electric field, pinch off capacitance, and after that thickness of the device parameters’ dependence have been mathematically derived from attaining the objective. Finally, a model based on a dual-material gate in CSDG MOSFET has been proposed. The electrical field in CSDG MOSFET has been analyzed in detail using a mathematical derivation of device physics, including the Surface-Potential, threshold voltage, and the gate-oxide capacitances of the internal and external part of the device. Further, the gate-oxide capacitance of CSDG MOSFET, particularly to the device pinch-off condition, has been derived. Since the device operation and analysis at the shorter channel are not similar to conventional long-channel MOSFETs, the depletion-width variation has been studied. The identified notion has been applied to derive the approximate numerical solution and silicon thickness inducing parameters for CSDG MOSFET to deploy the improvements in the device performance and novel design modifications. As the gate-material and gate-stack engineering is an alternative to overcome the device performance degradation by enhancing the charge transport efficiency, the CSDG MOSFET in a novel Dual-Metal Gate (DMG) structure design has been proposed and analyzed using the solution of 2D Poisson’s equations in the geometrical boundary conditions of the device. The model expressions obtained solution using the proposed structure has been compared with a single metal gate structure. Finally, it has been analyzed that the proposed model exhibits an excellent match with the analytical model. The obtained DMG device structure advances the carrier velocity and transport efficiency, resulting in the surface-potential profile caused by dissimilar gate metal work-function. The superior device characteristics obtained employing a dual-material structure in CSDG are promising and can reduce the threshold voltage roll-off, suppress the hot-carrier effects and SCEs.